This patch fixes the console screen breakup that happens as a side
effect of adjusting the PLLs ("rkclock1 an mainbus0"). It does so by
butchering the PLL setting that causes trouble. This seemingly has no
adverse side effects, but is most likely NOT the correct solution!

Note: the current frequency of RK3399_PLL_CPLL before the setting is
384 MHz. The setting (discarded as a result of this patch) is 800 MHz.

Index: sys/dev/fdt/rkclock.c
===================================================================
RCS file: /cvs/src/sys/dev/fdt/rkclock.c,v
retrieving revision 1.61
diff -u -p -r1.61 rkclock.c
--- sys/dev/fdt/rkclock.c	9 Jan 2022 05:42:37 -0000	1.61
+++ sys/dev/fdt/rkclock.c	21 Feb 2022 21:53:48 -0000
@@ -2745,7 +2745,7 @@ rk3399_set_frequency(void *cookie, uint3
 	case RK3399_PLL_ABPLL:
 		return rk3399_set_pll(sc, RK3399_CRU_BPLL_CON(0), freq);
 	case RK3399_PLL_CPLL:
-		return rk3399_set_pll(sc, RK3399_CRU_CPLL_CON(0), freq);
+		return 0;
 	case RK3399_PLL_GPLL:
 		return rk3399_set_pll(sc, RK3399_CRU_GPLL_CON(0), freq);
 	case RK3399_PLL_NPLL: